尧图网站建设 
chipcampchipcamp:~/src/riscv$ cat /etc/os-release ##ubuntu22系统十年旧机器。PRETTY_NAMEUbuntu 22.04 LTSNAMEUbuntuVERSION_ID22.04VERSION22.04 (Jammy Jellyfish)VERSION_CODENAMEjammyIDubuntuID_LIKEdebianHOME_URLhttps://www.ubuntu.com/SUPPORT_URLhttps://help.ubuntu.com/BUG_REPORT_URLhttps://bugs.launchpad.net/ubuntu/PRIVACY_POLICY_URLhttps://www.ubuntu.com/legal/terms-and-policies/privacy-policyUBUNTU_CODENAMEjammychipcampchipcamp:~/src/riscv$ which iverilog/usr/bin/iverilogchipcampchipcamp:~/src/riscv$ which verilator/usr/bin/verilatorchipcampchipcamp:~/src/riscv$ which gtkwave/usr/bin/gtkwavechipcampchipcamp:~/src/riscv$ which riscv64-unknown-elf-gcc/usr/bin/riscv64-unknown-elf-gccchipcampchipcamp:~/src/riscv$chipcampchipcamp:~/src/riscv$ dpkg-query -S /usr/bin/iverilog /usr/bin/verilator /usr/bin/gtkwave /usr/bin/riscv64-unknown-elf-gcciverilog: /usr/bin/iverilogverilator: /usr/bin/verilatorgtkwave: /usr/bin/gtkwavegcc-riscv64-unknown-elf: /usr/bin/riscv64-unknown-elf-gcc------以上所有的软件都是使用apt-get install安装的这是本文所说的“0依赖”。chipcampchipcamp:~/src/riscv$ git clone https://gitcode.com/chipcamp/darkriscv.gitCloning into darkriscv...remote: Enumerating objects: 3796, done.remote: Total 3796 (delta 0), reused 0 (delta 0), pack-reused 3796 (from 1)Receiving objects: 100% (3796/3796), 4.96 MiB | 482.00 KiB/s, done.Resolving deltas: 100% (2536/2536), done.chipcampchipcamp:~/src/riscv$ cd darkriscvchipcampchipcamp:~/src/riscv/darkriscv$ ls -latotal 180drwxrwxr-x 11 chipcamp chipcamp 4096 Oct 7 11:04 .drwxrwxr-x 4 chipcamp chipcamp 4096 Oct 7 11:03 ..-rw-rw-r-- 1 chipcamp chipcamp 6 Oct 7 11:04 .bazelversiondrwxrwxr-x 24 chipcamp chipcamp 4096 Oct 7 11:04 boards-rw-rw-r-- 1 chipcamp chipcamp 532 Oct 7 11:04 BUILD.bazeldrwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 11:04 comments-rw-rw-r-- 1 chipcamp chipcamp 3759 Oct 7 11:04 darkriscv.coredrwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 11:04 docdrwxrwxr-x 8 chipcamp chipcamp 4096 Oct 7 11:04 .git-rw-rw-r-- 1 chipcamp chipcamp 161 Oct 7 11:04 .gitattributesdrwxrwxr-x 3 chipcamp chipcamp 4096 Oct 7 11:04 .github-rw-rw-r-- 1 chipcamp chipcamp 255 Oct 7 11:04 .gitignore-rw-rw-r-- 1 chipcamp chipcamp 1517 Oct 7 11:04 LICENSE-rw-rw-r-- 1 chipcamp chipcamp 2201 Oct 7 11:04 Makefile-rw-rw-r-- 1 chipcamp chipcamp 708 Oct 7 11:04 MODULE.bazel-rw-rw-r-- 1 chipcamp chipcamp 32687 Oct 7 11:04 MODULE.bazel.lock-rw-rw-r-- 1 chipcamp chipcamp 71846 Oct 7 11:04 README.mddrwxrwxr-x 3 chipcamp chipcamp 4096 Oct 7 11:04 rtldrwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 11:04 simdrwxrwxr-x 11 chipcamp chipcamp 4096 Oct 7 11:04 srcdrwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 11:04 tmpchipcampchipcamp:~/src/riscv/darkriscv$ more Makefiledefault: src/darksocv.memmake -C simall:make -C src allmake -C sim allmake -C boards allsrc/darksocv.mem:make -C src allinstall:make -C boards installchipcampchipcamp:~/src/riscv/darkriscv$ make defaultmake -C simmake[1]: Entering directory /home/chipcamp/src/riscv/darkriscv/simiverilog -Wall -I ../rtl -o darksocv darksimv.v ../rtl/darksocv.v ../rtl/darkbridge.v ../rtl/darkuart.v ../rtl/darkriscv.v ../rtl/darkpll.v ../rtl/darkram.v ../rtl/darkio.v ../rtl/darkcache.v ../rtl/darkmac.v ../rtl/lib/sdram/mt48lc16m16a2_ctrl.vecho VCDSdarksocv.vcd: XSIMdarksocvVCDSdarksocv.vcd: XSIMdarksocvdpram: unified BRAM w/ 2048x32-bitWARNING: ../rtl/darkram.v:88: $readmemh(../src/darksocv.mem): Not enough words in the file for the requested range [0:2047].VCD info: dumpfile darksocv.vcd opened for output.reset (startup)sdram: CLK: 64 MHzsdram: WAIT_100US: 6400 cyclessdram: TRP: 2 cyclessdram: TRC: 5 cyclessdram: TRCD: 2 cyclessdram: TCH: 1 cyclessdram: CAS_LATENCY: 2 cyclesvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvrr vvvvvvvvvvvvvvvvvvvvvvrr vvvvvvvvvvvvvvvvvvvvvvvv rrrrrr vvvvvvvvvvvvvvvvvvvvvvvvvv rrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvv rrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvv rrrrrrrrrrrrrrrrrr vvvvvvvvvvvvvv rrrrrrrrrrrrrrrrrrrrrr vvvvvvvvvv rrrrrrrrrrrrrrrrrrrrrrrrrr vvvvvv rrrrrrrrrrrrrrrrrrrrrrrrrrrrrr vv rrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrr rrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrr rrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrr rrrrrrrrrrrrrrrrrrrrrrINSTRUCTION SETS WANT TO BE FREEboot0: main0200 stack1f7cboard: simulation only (id0)build: Sun, 12 Apr 2026 18:43:41 -0300 for rv32i_zicsrcore0: darkriscv100MHz rv32i little-endianbram0: text02001424 data162408f8 stack2000bram0: 228 bytes freeuart0: 115.2kbps (div25603)timr0: 1000Hz (div99999)csrxx: not foundstvec: not foundmtvec: not found (polling)Welcome to DarkRISCV!497 helphelpcommand: [help] not found.valid commands: clear, dump [hex], led [hex], timer [dec], oport [hex]mul [dec] [dec], div [dec] [dec], mac [dec] [dec] [dec]reboot, wr[m][bwl] [hex] [hex] [[hex] when m],rd[m][bwl] [hex] [[hex] when m], iport112 dump 100dump 1000100: 63 16 55 00 13 05 d0 00 6f f0 1f fe 67 80 00 00 c.U.....o...g...0110: 63 0e 05 00 13 05 f5 ff 83 82 47 00 93 f2 22 00 c.........G....0120: e3 88 02 fe 03 c5 57 00 67 80 00 00 13 05 f0 ff ......W.g.......0130: 67 80 00 00 0e a0 c1 12 9c c1 4d 07 9a c1 50 06 g.........M...P.0140: 98 c1 52 04 98 c1 52 04 98 c1 52 04 98 c1 50 06 ..R...R...R...P.0150: 96 02 c1 4d 07 96 04 c1 42 10 96 06 c1 42 0c 98 ...M....B....B..0160: 06 42 c1 44 06 9a 06 44 c1 46 06 96 06 46 c1 48 .B.D...D.F...F.H0170: 06 92 06 48 c1 4a 06 8e 06 4a c1 4c 06 8a 06 4c ...H.J...J.L...L0180: c1 4e 06 86 06 4e c1 50 06 82 06 50 c1 52 0a 52 .N...N.P...P.R.R0190: c1 54 06 54 c1 56 02 56 c2 07 00 20 72 76 0a 49 .T.T.V.V... rv.I01a0: 4e 53 54 52 55 43 54 49 4f 4e 20 53 45 54 53 20 NSTRUCTION SETS01b0: 57 41 4e 54 20 54 4f 20 42 45 20 46 52 45 45 0a WANT TO BE FREE.01c0: 0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................01d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................01e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................01f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................1921 led 1led 1led 0117 led 2led 2led 0217 ^C** VVP Stop(0) **** Flushing output streams.** Current simulation time is 2632995000 ticks. finish** Continue **make[1]: *** [Makefile:98: darksocv.vcd] Interruptmake: *** [Makefile:43: default] Interrupt------以上就是使用make default后运行iverilog对darkriscv项目总共11个verilog文件的仿真运行提供了一个类似于操作系统bash交互的运行界面----事实上这个运行界面是非常逼真的App on RISC-V从src/Makefile可以看到这个App是darkshell这是众多App中的其中一个通过更改src/Makefile可以将App改为coremark或者dhrystone等。但真正最好玩、对RISC-V SystemSoftware的体验最好的无疑就是这个darkriscv。----这个darkshell的App背后的darksoc是包含了CPU总线uart串口的而这个darkshell的App的交互式输入输出是通过uart完成的。即使在仿真中也实际使用了CPU RTL CPU uart的可以这样说这个项目要移植到某个FPGA中可以确认它的UART串口能按照预期提供交互式的darkshell功能因为这个功能已经经过了仿真。----如下是波形文件特别关注它的UART相关信号是有实际的信号值的。chipcampchipcamp:~/src/riscv/darkriscv$ find . -name *.vcd./sim/darksocv.vcdchipcampchipcamp:~/src/riscv/darkriscv$ find . -name *.vcd | xargs ls -l-rw-rw-r-- 1 chipcamp chipcamp 278636077 Oct 7 11:20 ./sim/darksocv.vcdchipcampchipcamp:~/src/riscv/darkriscv$chipcampchipcamp:~/src/riscv/darkriscv$ gtkwave ./sim/darksocv.vcd [1] 14295chipcampchipcamp:~/src/riscv/darkriscv$GTKWave Analyzer v3.3.104 (w)1999-2020 BSIWarning! File size is 265 MB. This might fail in recoding.Consider converting it to the FST database format instead. (See thevcd2fst(1) manpage for more information.)To disable this warning, set rc variable vcd_warning_filesize to zero.Alternatively, use the -o, --optimize command line option to convert to FSTor the -g, --giga command line option to use dynamically compressed memory.[0] start time.[2632995000] end time.chipcampchipcamp:~/src/riscv/darkriscv$----如图所示2632995ns的时间和上面文字中的[2632995000] end time是一致的。可以推断testbench.v文件中又是使用的timescale 1 ns / 1 ps后者才会让iverilog仿真时testbench.v文件输出的vcd文件里记录的end time是ps为单位而gtkwave的图形显示则是ns为单位。----左侧窗口里显示了整个darksoc的hierarchy也就是哪些模块是top模块哪些是下一级的模块。----最顶层的darksimv模块有4个信号分别是CLK,RES,TX,RX。其中RES大概就是Rest。在图中关注以下这个信号是在1us的时间点从1变为0的。这和前面picorv32的例子一模一样。----接着关注uart0模块实例里的LASTCHAR[7:0]这个信号如下----如果仔细观察可以看出这个LASTCHAR[7:0]信号包含了上面的darkshell所打印出来的字符串“INSTRUCTION SETS WANT TO BE FREE”的ASCII码流。----如果仔细操作这个波形图针对uart0的LASTCHAR[7:0]信号的观测可以不断缩小并覆盖全部的时间区间如图的2600us或者2.6秒。----以上便是darkriscv的零门槛上手体验其中darkshell这个App是有源代码的同时也有编译并生成好的hex文件src/darksocv.mem在make default的时候这个文件已经是存在的因此无需重新编译而是直接调用iverilog进行仿真即可在rtl/darkram.v中会使用readmemh()读取这个darksocv.mem文件。----如果想从0编译出这个hex文件可以参考Makefile中的文件进行尝试。不过本次使用的Ubuntu22的环境以及对应的riscv64-unknown-elf-工具编译的时候出了一点错误如下所示。这需要进一步解决但这不影响对darkriscv项目的最核心的体验----darkShell on RISC-V SOC with UART RTL。chipcampchipcamp:~/src/riscv/darkriscv$ make -C src allmake: Entering directory /home/chipcamp/src/riscv/darkriscv/src/usr/bin/riscv64-unknown-elf-gcc -marchrv32i_zicsr-mabiilp32-mlittle-endian-c -o boot.o boot.Sriscv64-unknown-elf-gcc: error: unrecognized command-line option -mlittle-endianmake: *** [builtin: boot.o] Error 1make: Leaving directory /home/chipcamp/src/riscv/darkriscv/srcchipcampchipcamp:~/src/riscv/darkriscv$ make allmake -C src allmake[1]: Entering directory /home/chipcamp/src/riscv/darkriscv/src/usr/bin/riscv64-unknown-elf-gcc -marchrv32i_zicsr -mabiilp32 -mlittle-endian -c -o boot.o boot.Sriscv64-unknown-elf-gcc: error: unrecognized command-line option -mlittle-endianmake[1]: *** [builtin: boot.o] Error 1make[1]: Leaving directory /home/chipcamp/src/riscv/darkriscv/srcmake: *** [Makefile:46: all] Error 2chipcampchipcamp:~/src/riscv/darkriscv$ vi src/Makefilechipcampchipcamp:~/src/riscv/darkriscv$ riscv64-unknown-elf-gcc --helpUsage: riscv64-unknown-elf-gcc [options] file...Options:-pass-exit-codes Exit with highest error code from a phase.--help Display this information.--target-help Display target specific command line options.--help{common|optimizers|params|target|warnings|[^]{joined|separate|undocumented}}[,...].Display specific types of command line options.(Use -v --help to display command line options of sub-processes).--version Display compiler version information.-dumpspecs Display all of the built in spec strings.-dumpversion Display the version of the compiler.-dumpmachine Display the compilers target processor.-print-search-dirs Display the directories in the compilers search path.-print-libgcc-file-name Display the name of the compilers companion library.-print-file-namelib Display the full path to library lib.-print-prog-nameprog Display the full path to compiler component prog.-print-multiarch Display the targets normalized GNU triplet, used asa component in the library path.-print-multi-directory Display the root directory for versions of libgcc.-print-multi-lib Display the mapping between command line options andmultiple library search directories.-print-multi-os-directory Display the relative path to OS libraries.-print-sysroot Display the target libraries directory.-print-sysroot-headers-suffix Display the sysroot suffix used to find headers.-Wa,options Pass comma-separated options on to the assembler.-Wp,options Pass comma-separated options on to the preprocessor.-Wl,options Pass comma-separated options on to the linker.-Xassembler arg Pass arg on to the assembler.-Xpreprocessor arg Pass arg on to the preprocessor.-Xlinker arg Pass arg on to the linker.-save-temps Do not delete intermediate files.-save-tempsarg Do not delete intermediate files.-no-canonical-prefixes Do not canonicalize paths when building relativeprefixes to other gcc components.-pipe Use pipes rather than intermediate files.-time Time the execution of each subprocess.-specsfile Override built-in specs with the contents of file.-stdstandard Assume that the input sources are for standard.--sysrootdirectory Use directory as the root directory for headersand libraries.-B directory Add directory to the compilers search paths.-v Display the programs invoked by the compiler.-### Like -v but options quoted and commands not executed.-E Preprocess only; do not compile, assemble or link.-S Compile only; do not assemble or link.-c Compile and assemble, but do not link.-o file Place the output into file.-pie Create a dynamically linked position independentexecutable.-shared Create a shared library.-x language Specify the language of the following input files.Permissible languages include: c c assembler nonenone means revert to the default behavior ofguessing the language based on the files extension.Options starting with -g, -f,-m, -O, -W, or --param are automaticallypassed on tothe various sub-processes invoked by riscv64-unknown-elf-gcc.In order to passother options on to these processes the -Wletter options must be used.For bug reporting instructions, please see:https://gcc.gnu.org/bugs/.chipcampchipcamp:~/src/riscv/darkriscv$ riscv64-unknown-elf-gcc --versionriscv64-unknown-elf-gcc () 10.2.0Copyright (C) 2020 Free Software Foundation, Inc.This is free software; see the source for copying conditions. There is NOwarranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.chipcampchipcamp:~/src/riscv/darkriscv$----以上错误信息Options starting with -g, -f,-m, -O, -W, or --param are automaticallypassed on tothe various sub-processes invoked by riscv64-unknown-elf-gcc.很有启发意义说明了gcc命令行是进一步调用了cc(编译器)、ar(汇编器)、ld(链接器)等工具并传递参数的一个门户/入口工具。完END关键词darkriscv, uart, timescale, clk, resetn, gtkwave, darkshell, darksocv, app on RISCV SOC RTL。摘要本文记录了darkriscv项目的make过程该项目除了提供RISCV CPU以外还提供了总线UART构成了SoC更重要的是其提供的默认app是darkshell不仅展现了如操作系统一般的交互式shell界面体验而且这个交互式shell还是以UART串口为实际的输入输出也就是说这个shell RTL-testbench的仿真覆盖了uart串口的功能。 零门槛上手的RISC-V项目：darkriscv
chipcampchipcamp:~/src/riscv$ cat /etc/os-release ##ubuntu22系统十年旧机器。PRETTY_NAMEUbuntu 22.04 LTSNAMEUbuntuVERSION_ID22.04VERSION22.04 (Jammy Jellyfish)VERSION_CODENAMEjammyIDubuntuID_LIKEdebianHOME_URLhttps://www.ubuntu.com/SUPPORT_URLhttps://help.ubuntu.com/BUG_REPORT_URLhttps://bugs.launchpad.net/ubuntu/PRIVACY_POLICY_URLhttps://www.ubuntu.com/legal/terms-and-policies/privacy-policyUBUNTU_CODENAMEjammychipcampchipcamp:~/src/riscv$ which iverilog/usr/bin/iverilogchipcampchipcamp:~/src/riscv$ which verilator/usr/bin/verilatorchipcampchipcamp:~/src/riscv$ which gtkwave/usr/bin/gtkwavechipcampchipcamp:~/src/riscv$ which riscv64-unknown-elf-gcc/usr/bin/riscv64-unknown-elf-gccchipcampchipcamp:~/src/riscv$chipcampchipcamp:~/src/riscv$ dpkg-query -S /usr/bin/iverilog /usr/bin/verilator /usr/bin/gtkwave /usr/bin/riscv64-unknown-elf-gcciverilog: /usr/bin/iverilogverilator: /usr/bin/verilatorgtkwave: /usr/bin/gtkwavegcc-riscv64-unknown-elf: /usr/bin/riscv64-unknown-elf-gcc------以上所有的软件都是使用apt-get install安装的这是本文所说的“0依赖”。chipcampchipcamp:~/src/riscv$ git clone https://gitcode.com/chipcamp/darkriscv.gitCloning into darkriscv...remote: Enumerating objects: 3796, done.remote: Total 3796 (delta 0), reused 0 (delta 0), pack-reused 3796 (from 1)Receiving objects: 100% (3796/3796), 4.96 MiB | 482.00 KiB/s, done.Resolving deltas: 100% (2536/2536), done.chipcampchipcamp:~/src/riscv$ cd darkriscvchipcampchipcamp:~/src/riscv/darkriscv$ ls -latotal 180drwxrwxr-x 11 chipcamp chipcamp 4096 Oct 7 11:04 .drwxrwxr-x 4 chipcamp chipcamp 4096 Oct 7 11:03 ..-rw-rw-r-- 1 chipcamp chipcamp 6 Oct 7 11:04 .bazelversiondrwxrwxr-x 24 chipcamp chipcamp 4096 Oct 7 11:04 boards-rw-rw-r-- 1 chipcamp chipcamp 532 Oct 7 11:04 BUILD.bazeldrwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 11:04 comments-rw-rw-r-- 1 chipcamp chipcamp 3759 Oct 7 11:04 darkriscv.coredrwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 11:04 docdrwxrwxr-x 8 chipcamp chipcamp 4096 Oct 7 11:04 .git-rw-rw-r-- 1 chipcamp chipcamp 161 Oct 7 11:04 .gitattributesdrwxrwxr-x 3 chipcamp chipcamp 4096 Oct 7 11:04 .github-rw-rw-r-- 1 chipcamp chipcamp 255 Oct 7 11:04 .gitignore-rw-rw-r-- 1 chipcamp chipcamp 1517 Oct 7 11:04 LICENSE-rw-rw-r-- 1 chipcamp chipcamp 2201 Oct 7 11:04 Makefile-rw-rw-r-- 1 chipcamp chipcamp 708 Oct 7 11:04 MODULE.bazel-rw-rw-r-- 1 chipcamp chipcamp 32687 Oct 7 11:04 MODULE.bazel.lock-rw-rw-r-- 1 chipcamp chipcamp 71846 Oct 7 11:04 README.mddrwxrwxr-x 3 chipcamp chipcamp 4096 Oct 7 11:04 rtldrwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 11:04 simdrwxrwxr-x 11 chipcamp chipcamp 4096 Oct 7 11:04 srcdrwxrwxr-x 2 chipcamp chipcamp 4096 Oct 7 11:04 tmpchipcampchipcamp:~/src/riscv/darkriscv$ more Makefiledefault: src/darksocv.memmake -C simall:make -C src allmake -C sim allmake -C boards allsrc/darksocv.mem:make -C src allinstall:make -C boards installchipcampchipcamp:~/src/riscv/darkriscv$ make defaultmake -C simmake[1]: Entering directory /home/chipcamp/src/riscv/darkriscv/simiverilog -Wall -I ../rtl -o darksocv darksimv.v ../rtl/darksocv.v ../rtl/darkbridge.v ../rtl/darkuart.v ../rtl/darkriscv.v ../rtl/darkpll.v ../rtl/darkram.v ../rtl/darkio.v ../rtl/darkcache.v ../rtl/darkmac.v ../rtl/lib/sdram/mt48lc16m16a2_ctrl.vecho VCDSdarksocv.vcd: XSIMdarksocvVCDSdarksocv.vcd: XSIMdarksocvdpram: unified BRAM w/ 2048x32-bitWARNING: ../rtl/darkram.v:88: $readmemh(../src/darksocv.mem): Not enough words in the file for the requested range [0:2047].VCD info: dumpfile darksocv.vcd opened for output.reset (startup)sdram: CLK: 64 MHzsdram: WAIT_100US: 6400 cyclessdram: TRP: 2 cyclessdram: TRC: 5 cyclessdram: TRCD: 2 cyclessdram: TCH: 1 cyclessdram: CAS_LATENCY: 2 cyclesvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvvrr vvvvvvvvvvvvvvvvvvvvvvrr vvvvvvvvvvvvvvvvvvvvvvvv rrrrrr vvvvvvvvvvvvvvvvvvvvvvvvvv rrrrrrrrrr vvvvvvvvvvvvvvvvvvvvvv rrrrrrrrrrrrrr vvvvvvvvvvvvvvvvvv rrrrrrrrrrrrrrrrrr vvvvvvvvvvvvvv rrrrrrrrrrrrrrrrrrrrrr vvvvvvvvvv rrrrrrrrrrrrrrrrrrrrrrrrrr vvvvvv rrrrrrrrrrrrrrrrrrrrrrrrrrrrrr vv rrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrr rrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrr rrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrrr rrrrrrrrrrrrrrrrrrrrrrINSTRUCTION SETS WANT TO BE FREEboot0: main0200 stack1f7cboard: simulation only (id0)build: Sun, 12 Apr 2026 18:43:41 -0300 for rv32i_zicsrcore0: darkriscv100MHz rv32i little-endianbram0: text02001424 data162408f8 stack2000bram0: 228 bytes freeuart0: 115.2kbps (div25603)timr0: 1000Hz (div99999)csrxx: not foundstvec: not foundmtvec: not found (polling)Welcome to DarkRISCV!497 helphelpcommand: [help] not found.valid commands: clear, dump [hex], led [hex], timer [dec], oport [hex]mul [dec] [dec], div [dec] [dec], mac [dec] [dec] [dec]reboot, wr[m][bwl] [hex] [hex] [[hex] when m],rd[m][bwl] [hex] [[hex] when m], iport112 dump 100dump 1000100: 63 16 55 00 13 05 d0 00 6f f0 1f fe 67 80 00 00 c.U.....o...g...0110: 63 0e 05 00 13 05 f5 ff 83 82 47 00 93 f2 22 00 c.........G....0120: e3 88 02 fe 03 c5 57 00 67 80 00 00 13 05 f0 ff ......W.g.......0130: 67 80 00 00 0e a0 c1 12 9c c1 4d 07 9a c1 50 06 g.........M...P.0140: 98 c1 52 04 98 c1 52 04 98 c1 52 04 98 c1 50 06 ..R...R...R...P.0150: 96 02 c1 4d 07 96 04 c1 42 10 96 06 c1 42 0c 98 ...M....B....B..0160: 06 42 c1 44 06 9a 06 44 c1 46 06 96 06 46 c1 48 .B.D...D.F...F.H0170: 06 92 06 48 c1 4a 06 8e 06 4a c1 4c 06 8a 06 4c ...H.J...J.L...L0180: c1 4e 06 86 06 4e c1 50 06 82 06 50 c1 52 0a 52 .N...N.P...P.R.R0190: c1 54 06 54 c1 56 02 56 c2 07 00 20 72 76 0a 49 .T.T.V.V... rv.I01a0: 4e 53 54 52 55 43 54 49 4f 4e 20 53 45 54 53 20 NSTRUCTION SETS01b0: 57 41 4e 54 20 54 4f 20 42 45 20 46 52 45 45 0a WANT TO BE FREE.01c0: 0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................01d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................01e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................01f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................1921 led 1led 1led 0117 led 2led 2led 0217 ^C** VVP Stop(0) **** Flushing output streams.** Current simulation time is 2632995000 ticks. finish** Continue **make[1]: *** [Makefile:98: darksocv.vcd] Interruptmake: *** [Makefile:43: default] Interrupt------以上就是使用make default后运行iverilog对darkriscv项目总共11个verilog文件的仿真运行提供了一个类似于操作系统bash交互的运行界面----事实上这个运行界面是非常逼真的App on RISC-V从src/Makefile可以看到这个App是darkshell这是众多App中的其中一个通过更改src/Makefile可以将App改为coremark或者dhrystone等。但真正最好玩、对RISC-V SystemSoftware的体验最好的无疑就是这个darkriscv。----这个darkshell的App背后的darksoc是包含了CPU总线uart串口的而这个darkshell的App的交互式输入输出是通过uart完成的。即使在仿真中也实际使用了CPU RTL CPU uart的可以这样说这个项目要移植到某个FPGA中可以确认它的UART串口能按照预期提供交互式的darkshell功能因为这个功能已经经过了仿真。----如下是波形文件特别关注它的UART相关信号是有实际的信号值的。chipcampchipcamp:~/src/riscv/darkriscv$ find . -name *.vcd./sim/darksocv.vcdchipcampchipcamp:~/src/riscv/darkriscv$ find . -name *.vcd | xargs ls -l-rw-rw-r-- 1 chipcamp chipcamp 278636077 Oct 7 11:20 ./sim/darksocv.vcdchipcampchipcamp:~/src/riscv/darkriscv$chipcampchipcamp:~/src/riscv/darkriscv$ gtkwave ./sim/darksocv.vcd [1] 14295chipcampchipcamp:~/src/riscv/darkriscv$GTKWave Analyzer v3.3.104 (w)1999-2020 BSIWarning! File size is 265 MB. This might fail in recoding.Consider converting it to the FST database format instead. (See thevcd2fst(1) manpage for more information.)To disable this warning, set rc variable vcd_warning_filesize to zero.Alternatively, use the -o, --optimize command line option to convert to FSTor the -g, --giga command line option to use dynamically compressed memory.[0] start time.[2632995000] end time.chipcampchipcamp:~/src/riscv/darkriscv$----如图所示2632995ns的时间和上面文字中的[2632995000] end time是一致的。可以推断testbench.v文件中又是使用的timescale 1 ns / 1 ps后者才会让iverilog仿真时testbench.v文件输出的vcd文件里记录的end time是ps为单位而gtkwave的图形显示则是ns为单位。----左侧窗口里显示了整个darksoc的hierarchy也就是哪些模块是top模块哪些是下一级的模块。----最顶层的darksimv模块有4个信号分别是CLK,RES,TX,RX。其中RES大概就是Rest。在图中关注以下这个信号是在1us的时间点从1变为0的。这和前面picorv32的例子一模一样。----接着关注uart0模块实例里的LASTCHAR[7:0]这个信号如下----如果仔细观察可以看出这个LASTCHAR[7:0]信号包含了上面的darkshell所打印出来的字符串“INSTRUCTION SETS WANT TO BE FREE”的ASCII码流。----如果仔细操作这个波形图针对uart0的LASTCHAR[7:0]信号的观测可以不断缩小并覆盖全部的时间区间如图的2600us或者2.6秒。----以上便是darkriscv的零门槛上手体验其中darkshell这个App是有源代码的同时也有编译并生成好的hex文件src/darksocv.mem在make default的时候这个文件已经是存在的因此无需重新编译而是直接调用iverilog进行仿真即可在rtl/darkram.v中会使用readmemh()读取这个darksocv.mem文件。----如果想从0编译出这个hex文件可以参考Makefile中的文件进行尝试。不过本次使用的Ubuntu22的环境以及对应的riscv64-unknown-elf-工具编译的时候出了一点错误如下所示。这需要进一步解决但这不影响对darkriscv项目的最核心的体验----darkShell on RISC-V SOC with UART RTL。chipcampchipcamp:~/src/riscv/darkriscv$ make -C src allmake: Entering directory /home/chipcamp/src/riscv/darkriscv/src/usr/bin/riscv64-unknown-elf-gcc -marchrv32i_zicsr-mabiilp32-mlittle-endian-c -o boot.o boot.Sriscv64-unknown-elf-gcc: error: unrecognized command-line option -mlittle-endianmake: *** [builtin: boot.o] Error 1make: Leaving directory /home/chipcamp/src/riscv/darkriscv/srcchipcampchipcamp:~/src/riscv/darkriscv$ make allmake -C src allmake[1]: Entering directory /home/chipcamp/src/riscv/darkriscv/src/usr/bin/riscv64-unknown-elf-gcc -marchrv32i_zicsr -mabiilp32 -mlittle-endian -c -o boot.o boot.Sriscv64-unknown-elf-gcc: error: unrecognized command-line option -mlittle-endianmake[1]: *** [builtin: boot.o] Error 1make[1]: Leaving directory /home/chipcamp/src/riscv/darkriscv/srcmake: *** [Makefile:46: all] Error 2chipcampchipcamp:~/src/riscv/darkriscv$ vi src/Makefilechipcampchipcamp:~/src/riscv/darkriscv$ riscv64-unknown-elf-gcc --helpUsage: riscv64-unknown-elf-gcc [options] file...Options:-pass-exit-codes Exit with highest error code from a phase.--help Display this information.--target-help Display target specific command line options.--help{common|optimizers|params|target|warnings|[^]{joined|separate|undocumented}}[,...].Display specific types of command line options.(Use -v --help to display command line options of sub-processes).--version Display compiler version information.-dumpspecs Display all of the built in spec strings.-dumpversion Display the version of the compiler.-dumpmachine Display the compilers target processor.-print-search-dirs Display the directories in the compilers search path.-print-libgcc-file-name Display the name of the compilers companion library.-print-file-namelib Display the full path to library lib.-print-prog-nameprog Display the full path to compiler component prog.-print-multiarch Display the targets normalized GNU triplet, used asa component in the library path.-print-multi-directory Display the root directory for versions of libgcc.-print-multi-lib Display the mapping between command line options andmultiple library search directories.-print-multi-os-directory Display the relative path to OS libraries.-print-sysroot Display the target libraries directory.-print-sysroot-headers-suffix Display the sysroot suffix used to find headers.-Wa,options Pass comma-separated options on to the assembler.-Wp,options Pass comma-separated options on to the preprocessor.-Wl,options Pass comma-separated options on to the linker.-Xassembler arg Pass arg on to the assembler.-Xpreprocessor arg Pass arg on to the preprocessor.-Xlinker arg Pass arg on to the linker.-save-temps Do not delete intermediate files.-save-tempsarg Do not delete intermediate files.-no-canonical-prefixes Do not canonicalize paths when building relativeprefixes to other gcc components.-pipe Use pipes rather than intermediate files.-time Time the execution of each subprocess.-specsfile Override built-in specs with the contents of file.-stdstandard Assume that the input sources are for standard.--sysrootdirectory Use directory as the root directory for headersand libraries.-B directory Add directory to the compilers search paths.-v Display the programs invoked by the compiler.-### Like -v but options quoted and commands not executed.-E Preprocess only; do not compile, assemble or link.-S Compile only; do not assemble or link.-c Compile and assemble, but do not link.-o file Place the output into file.-pie Create a dynamically linked position independentexecutable.-shared Create a shared library.-x language Specify the language of the following input files.Permissible languages include: c c assembler nonenone means revert to the default behavior ofguessing the language based on the files extension.Options starting with -g, -f,-m, -O, -W, or --param are automaticallypassed on tothe various sub-processes invoked by riscv64-unknown-elf-gcc.In order to passother options on to these processes the -Wletter options must be used.For bug reporting instructions, please see:https://gcc.gnu.org/bugs/.chipcampchipcamp:~/src/riscv/darkriscv$ riscv64-unknown-elf-gcc --versionriscv64-unknown-elf-gcc () 10.2.0Copyright (C) 2020 Free Software Foundation, Inc.This is free software; see the source for copying conditions. There is NOwarranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.chipcampchipcamp:~/src/riscv/darkriscv$----以上错误信息Options starting with -g, -f,-m, -O, -W, or --param are automaticallypassed on tothe various sub-processes invoked by riscv64-unknown-elf-gcc.很有启发意义说明了gcc命令行是进一步调用了cc(编译器)、ar(汇编器)、ld(链接器)等工具并传递参数的一个门户/入口工具。完END关键词darkriscv, uart, timescale, clk, resetn, gtkwave, darkshell, darksocv, app on RISCV SOC RTL。摘要本文记录了darkriscv项目的make过程该项目除了提供RISCV CPU以外还提供了总线UART构成了SoC更重要的是其提供的默认app是darkshell不仅展现了如操作系统一般的交互式shell界面体验而且这个交互式shell还是以UART串口为实际的输入输出也就是说这个shell RTL-testbench的仿真覆盖了uart串口的功能。