verilog HDLBits刷题[Finding bugs in code]“Bugs case”---Case statement

1、题目This combinational circuit is supposed to recognize 8-bit keyboard scancodes for keys 0 through 9. It should indicate whether one of the 10 cases were recognized (valid), and if so, which key was detected. Fix the bug(s).2、分析valid不应该在端口赋初值case语句里面统一使用十六进制hcode位宽为8bit而且valid和valid应该在每一个code的值都有具体值不然会产生latch风险3、代码module top_module ( input [7:0] code, output reg [3:0] out, output reg valid );// always (*) case (code) 8h45: begin out 0;valid1;end 8h16: begin out 1;valid1;end 8h1e: begin out 2;valid1;end 8h26: begin out 3;valid1;end 8h25: begin out 4;valid1;end 8h2e: begin out 5;valid1;end 8h36: begin out 6;valid1;end 8h3d: begin out 7;valid1;end 8h3e: begin out 8;valid1;end 8h46: begin out 9;valid1;end default: begin out 0;valid 0;end endcase endmodule4、结果